2D Semiconductors Stalk Silicon at the Edge of Moore’s Law

In work presented this week at IEEE International Electron Devices Meeting, in San Francisco, researchers at Intel, Stanford, and TSMC presented separate solutions to one of the most vexing barriers to making 2D transistors: sharp spikes of resistance at the places where the semiconductor meets metal contacts. Meanwhile, engineers at imec showed both how they’re clearing a path to commercial-grade manufacturing processes and demonstrating just how small future 2D transistors might be. And researchers in Beijing and Wuhan have constructed the 2D equivalents of the most advanced types of silicon devices.