Lithography Technique Precisely Controls Nanodevice Feature Sizes

Researchers at the University of Hong Kong (HKU) developed an approach for nanodevice fabrication to increase the efficiency of building nanostructures that require spatially different dimensions. The researchers devised and demonstrated a practical, scalable approach to nanolithography that combines interference lithography and grayscale-patterned secondary exposure (IL-GPSE). The technique enables high-throughput nanopatterning on a wafer-scale area as well as on-demand spatial modulation of nanostructures.